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On Jun 3,  7:15pm, Mike Orton wrote:
> At 1:57 PM 6/2/95, Basil_Pappas at avid.com wrote:

> First, the bandwidth required to simultaneously play back several
> sources of uncompressed, real time component digital video and audio is
> too large for any single computer/disk system that currently exists.
> Second, the computing power required to execute all of the real time
> functions of an on line editing system in software is far beyond the
> capabilities of even the fastest existing supercomputer.
> And third, pull down menus or similar CRT based controls will never
> be ergonomically fast enough. Some type of physical controls
> (e.g., switches, shaft encoders, lever arms,  etc.) will continue to be
> required.

  The following response is not intended as a net add but for information
purposes only. I will provide enough details to make the point and anyone
desiring more information can send me a note off line...

  Sarnoff Real Time Corporation is a new 30 person commercial spinoff from the
David Sarnoff Research Center. We are commercializing a "Video Supercomputer"
we have developed here since 1983. Originally developed to provide real-time
simulation of receivers, encoders, Grand Alliance and other DSP algorithms
using full resolution sources it is now being applied as both a video processor
and server. We are currently testing our third generation system - "MAGIC"
(don't ask about the acronym). Our product focus is primarily on the Video
Server market, however, due to popular demand we are planning both broadcast
and post servers with multiple channels of D1, D2 and HD1000 I/O's. THE major
theme of our new system is BANDWIDTH UTILIZATION. The system has 672 MBYTES/S
of continuous input bandwidth and 1.34 GIGABYTES/S of output bandwidth - that
is sufficient for 25 simultaneous D1's in and about 50 D1's out. All I/O
operates SIMULTANEOUSLY. All the I/O bandwidth is available in MINIMUM
configurations of the system and we believe the system will be cost competetive
with future SGI Challenges.

  The MAGIC system is massively parallel in both video processors and
(optional) disks. The disk array, a.k.a. "Image Vault" matches a processor to a
disk. Capture bandwidth aggregates linearly and is the real limit to the number
of supported D1 channels. To give an idea of the performance here are a few
system configurations with specifications:

TABLE 1. Disk Space (GB) vs Number of Processors

   Number of     1GB    2GB      4GB      8GB  Aggregate  Simultaneous
  Processors     Per    Per      Per      Per    Disk BW  D1 Capture
      &Disks   Drive  Drive    Drive    Drive     (MB/S)  Channels
          16      16     32       64      128         64  2 I/O
          32      32     64      128      256        128  4 I/O
          48      48     96      192      384        192  4 In & 3 Out
          64      64    128      256      512        256  4 In & 4 Out
          96      96    192      384      768        384  6 In & 6 Out
         128     128    256      512     1024        512  8 In & 8 Out
         256     256    512     1024     2048       1024  16 In & 16

TABLE 2 - Performance scaling vs Number of Processors

  Number       Virtual        Real-time      Total Frames     Disk Capture BW
    of        Processor      Instructions       in Ram            (MB/S)
Processors      Ratio         per Pixel      (2MB/Proc)
    16            45              60              95                64
    32            23             119             190               128
    64            12             235             379               256
   128            6              454             759               512
   256            3              852             1517              1024
   512            2              1515            3034              2048
   768            1              2045            4551              3072
   1536           1              3149            9102              6144

 Real Time instructions per pixel refers to the number of available
instructions to process a continuous D1 input. The TOTAL number of instructions
executed for a 256 processor configuration is 10.7 billion per second. This is
a VLIW machine with a 144 bit wide word and each instruction can do up to seven
independent operations. We typically yield 3 16-bit ops per instruction using
our C compiler. Microcode weenies can often gain even more efficiency. That
means that a 256 processor configuration can sustain about 30 billion useful
operations per second. What this means is that much lower cost MAGIC systems
without the full parallel disk array can be used to directly process multiple,
simultaneous D1 channels. For many applications no disk is required.

  One final caveate - the MAGIC system utilizes SGI GIO bus as its host
interface. We use Indy's, however, customers can pick their favorite Host. The
file system on the MAGIC is NFS mounted on the SGI file system and tranfers
to/from individual workstations will use "bandwidth best" (subject to
availability). Default transfers utilize the GIO bus.

   An extensive article on the MAGIC system will appear in the next issue of
the IEEE Journal of Parallel and Distributed Technology.

   Hope this post does not violate list "netettequet" but since folks here may
not know about our system I thought this much detail would be helpful. Requests
for specific product information can come directly to me and I will forward to
the appropriate people.

 Herb Taylor
 Sarnoff Real Time Corporation
 201 Washington Rd
 Princeton, New Jersey, 08543

 htaylor at srtc.com

 O: 609 - 734 - 2733
 F: 609 - 987 - 9447